The Design and Simulation of Signal Generator based on FPGA

Abstract: The article introduced the basic structure and the realization principle of direct digital frequency synthesizer (DDS), and analyzed main properties of DDS system, compared the different ways to achieve frequency synthesis to determine the design scheme in this paper. In addition to the realization of general waveform, the output of the system can realize any hand-painted waveform, improve the shortcomings of the current function generator, and also has the advantages of low cost, low power consumption, short development cycle, flexible design, has the very good practical value and broad application prospect.

Keywords: arbitrary waveform; FPGA; DDS; function generator

0 Introductions

With the development of electronic technology, more the higher requirements to the frequency such as stability, accuracy and waveform generator. For traditional function generator, if you need special waveform signal, it must be by means of simulation method, it not only can't guarantee signal that meet the requirements, but also poor flexibility. Some of the standard products widely used, such as the function signal generator USA Tektronix, Agilent, they can output sine wave, triangle wave, sawtooth wave, square wave, sin (x)/x, Gauss and so on many kinds of waveform signal. These products have completely functions, high performance index, but the price is expensive, the price is not high for some low-end users, and can not satisfy the pseudo random signal output of some special needs. In the digital domain, it uses the technology of direct digital frequency synthesis. The application of digital circuit in most operation, has There is nothing comparable to this advantage for traditional analog circuit, signal only converted into analog domain in the final stages of synthesis, from the aspects to reduce the complexity of design function generator, greatly improving the stability of the system. Therefore, according to the current application situation and needs of the project, there is an urgent need to study high accuracy, good stability, function parameters can be adjusted flexibly in low cost function generator.

1 The basic structure and principle of DDS

For function S=Rsinθ(t), As shown in Figure 1, the R radius around the origin counterclockwise rotation, the formation of R and X axis angle between the positive direction (T) is the phase angle, the R projection in Y axis of S is the amplitude value. When the R endpoint continuously rotates around the origin, θ(t) will continuously vary in the range of 0~360 DEG, S corresponding range is [-R, +R], as shown in Figure 1 (left).

Fig.1 Sine function S=Rsinθ(t)

If R around the circle by equal step which be in phase increment. The phase θ(t) will continue sine function in [0, 2π] range. Figure 2(C) is approximately sinusoidal functions one cycle under step number 64. By changing the phase increment size, can change the phase step in a cycle in quantity, which generates sine waves of different frequencies. The week of rotation becomes bigger, faster, higher frequency of waveform obtained; otherwise, when the step size is reduced, the output frequency is decreased

So, set the frequency control word to accumulate phase, obtained phase accumulation value as the address for the look-up table, the output waveform amplitude corresponding value. Enter a different frequency control word can get the phase increment accordingly, and then control the output signal frequency; change the amplitude data waveform storage table of contents, can produce a variety of waveforms.

2 The basic structure of DDS

Direct digital frequency synthesis use linear relationship between signal phase and time characteristics, direct sampling, quantization and mapped to the desired signal, the signal waveform with adjustable output frequency. The DDS system consists of phase accumulator, register and waveform memory. Phase accumulation function is realized by the N bit accumulator and register cascade, each clock cycle by frequency control output word K determines the phase accumulator increases the phase increment. The principle of DDS typical block diagram is as shown in figure 3.

A phase accumulator is N, the reference clock frequency is fc, the output frequency signal is:

Frequency resolution:

Waveform memory contains digital waveform amplitude information table with phase address, output a phase register as a look-up table address, change the frequency control word K can change the frequency of the output signal. By the waveform amplitude DDS nuclear output quantization value, converted to analog signal is sent to the D/A.

(1) The phase accumulator

The basic structure of the phase accumulator is as shown in Fig.4, which consists of binary adder and parallel data register. Accumulator length number is N, the phase of a cycle [0, 2π] divide into the smallest step of discrete phase ?θ=2π/2N, the corresponding address code is 0~2N-1, which is not synchronized value to accumulated on the phase in the clock frequency fc and based on K set the frequency control word.

Fig.4 The basic structure of accumulator

If the accumulator length N=4, minimum phase step size isΔθ=2π/16, the phase accumulator have 16 kinds of state. As shown in table 1.

(2) Sine look-up table

The output of phase accumulator is phase sequence code, need to go through a phase sequence code to transform device amplitude sequence code, the most commonly used method use ROM to complete the read-only memory. The sinusoidal amplitude 2N phase corresponding values calculated beforehand stored in ROM, the subsequent operation only look-up table.

Table 1 the relationship between ROM and phase control

3 The scheme of DDS design based on FPGA

In this paper, the design structure diagram of complex function generator system is as shown in figure 5. The system takes FPGA as the information processing core, mainly to complete the digital frequency synthesis, D/A conversion, choose filter, power amplifier, LCD display, the host computer and communications functions, the final output waveform signal of different frequency, amplitude.

4 Realization of ROM programming

After the initialization data files sinusoidal waveform, using Quartus software customization basic macro function, create ROM waveform data storage corresponding to import the.Mif file. In the reference clock frequency, the phase accumulator output value as the address, check the digital meter reading the corresponding amplitude value; ultimately achieve sinusoidal signal output accurate, software process is shown in figure 6.

5 Waveform output and simulation

Sine wave shape is more complex, so using look-up table method to obtain, and several triangle waves, saw tooth wave, square wave and other common waveform is relatively simple, waveform output by Verilog HDL programming can be easily.

Fig.6 Logical control process of sinusoidal signal

Manual drawing signal waveforms are required, graphics read with the MATLAB row vector and a column vector, the column vector for the phase value, row vector storage FPGA waveform amplitude table for the amplitude phase accumulation, according to the phase increment set, the output of the phase accumulator as a look-up table address waveform amplitude digital output corresponding, software flow diagram is shown in figure 7.

The output simulation results of arbitrary hand-painted waveform is as shown in Figure 8, the left is the arbitrary waveform obtained by drawing tools, with three different types of hand drawn curve as an example, their characteristics are: all phase points are only part of amplitude, phase point range and not continuous phase point amplitude. Gray again by MATLAB read image distribution of values, creating a stored table waveform corresponding simulation results for the system, the output. Function generator is not only support the drawing board for graphics, waveform scan obtained can also identify and reduction output.

6 Conclusions

Direct digital frequency synthesis is the third generation of frequency synthesis technology after frequency analog frequency synthesis and PLL Synthesis Technology, which has the advantages of high frequency resolution, low phase noise, high frequency stability and the high word integration etc.. The FPGA device has the advantages of high speed, high integration and field programmable, is widely applied in ASIC design. Combine the advantages of both, the paper take direct digital frequency synthesis technology as the theoretical basis, designed a low cost, small volume, simple and convenient operation based on the realization of arbitrary waveform output.

Reference

[1] YU Xiao, WANG Jia-li, GU Huai-dong. Design of Microwave Signal Generator Based on Embedded Linux[J]. Chinese Journal of Electron Devices, 2008, 31 (3):941-944

[2] Zhu Yanqing, He Yigang. The realization method of on-chip triangle wave signal generator[J]. Journal of electrician technology, 2008, 23 (10):95-99

[3] Frappe A, Flament A, Stefanelli B, etal. An All-Digital RF Signal Generator Using High-Speed IEEE Journal of Solid-State ∑ Modulators. Circuits, 2009, 44 (10): 2722-2732

[4] Wang Jiali, sun Lu. The frequency synthesis technology[M]. Xi'an: Xi'an Electronic and Science University press, 2009, 1-5